<XML><RECORDS><RECORD><REFERENCE_TYPE>3</REFERENCE_TYPE><REFNUM>8125</REFNUM><AUTHORS><AUTHOR>O'Donnell,J.T.</AUTHOR></AUTHORS><YEAR>2006</YEAR><TITLE>Interconnect and Geometric Layout in Hydra (Abstract)</TITLE><PLACE_PUBLISHED>Designing Correct Circuits (DCC'06), ETAPS, Vienna, March 2006.</PLACE_PUBLISHED><PUBLISHER>N/A</PUBLISHER><LABEL>O'Donnell:2006:8125</LABEL><KEYWORDS><KEYWORD>hardware description language</KEYWORD></KEYWORDS<ABSTRACT>Hydra is a functional computer hardware description language that allows circuit designs to be specified either with or without information about the geometric layout. Portions of a design may be specified at different levels of abstraction, and some may have geometric layouts while others do not. A circuit may be defined directly as a function from signals to signals, thus specifiying the interconnection structure but not the layout. Alternatively, the circuit definition may contain a layout, defined either using explicit coordinates or using geometric combining forms. Execution of the specification produces a data structure that contains explicitly the set of components and the wires that connect them, and also contains the geometric layout if that was specified. The implementation of Hydra uses the interconnection structure to simulate circuits, and can also produce layouts if the geometric structure is given in the specification. The language also supports formal methods, in the form of equational reasoning, which can be used to prove behavioural correctness as well as geometric properties of the circuit.</ABSTRACT><URL>http://www.dcs.gla.ac.uk/~jtod/publications/2006-DCC-interconnect-layout/</URL></RECORD></RECORDS></XML>