<XML><RECORDS><RECORD><REFERENCE_TYPE>3</REFERENCE_TYPE><REFNUM>8961</REFNUM><AUTHORS><AUTHOR>Cockshott,W.P.</AUTHOR><AUTHOR>Koltes,A.</AUTHOR><AUTHOR>O'Donnell,J.T.</AUTHOR><AUTHOR>Prosser,P.</AUTHOR><AUTHOR>Vanderbauwhede,W.</AUTHOR></AUTHORS><YEAR>2008</YEAR><TITLE>A Hardware Relaxation Paradigm for Solving NP-Hard Problems</TITLE><PLACE_PUBLISHED>Visions of Computer Science, BCS International Academic Research Conference</PLACE_PUBLISHED><PUBLISHER>N/A</PUBLISHER><PAGES>1-12</PAGES><LABEL>Cockshott:2008:8961</LABEL><KEYWORDS><KEYWORD>NP-hard problem</KEYWORD></KEYWORDS<ABSTRACT>Digital circuits with feedback loops can solve some instances of NP-hard problems by relaxation: the circuit will either oscillate or settle down to a stable state that represents a solution to the problem instance. This approach differs from using hardware accelerators to speed up the execution of deterministic algorithms, as it exploits stabilisation properties of circuits with feedback, and it allows a variety of hardware techniques that do not have counterparts in software. A feedback circuit that solves many instances of Boolean satisfiability problems is described, with experimental results from a preliminary simulation using a hardware accelerator.</ABSTRACT></RECORD></RECORDS></XML>