<XML><RECORDS><RECORD><REFERENCE_TYPE>7</REFERENCE_TYPE><REFNUM>9271</REFNUM><AUTHORS><AUTHOR>Vanderbauwhede,W.</AUTHOR></AUTHORS><YEAR>2010</YEAR><TITLE>High-level Programming of Dynamically Reconfigurable NoC-based Heterogeneous Multicore SoCs</TITLE><PLACE_PUBLISHED>Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication</PLACE_PUBLISHED><PUBLISHER>Idea Group Publishing</PUBLISHER><ISBN>1615208070</ISBN><LABEL>Vanderbauwhede:2010:9271</LABEL><KEYWORDS><KEYWORD>networks-on-chip</KEYWORD></KEYWORDS<ABSTRACT>With the increase in SoC complexity sand CMOS technology capabilities, the SoC design community has recently observed a convergence of a number of critical trends, all of them aimed at addressing the design gap: the advent of heterogeneous multi-core SoCs and Networks-on-Chip and the recognition of the need for design reuse through IP cores, for dynamic reconfigurability and for high abstraction-level design. In this chapter, we present a solution for High-level Programming of Dynamically Reconfigurable NoC-based Heterogeneous Multicore SoCs. Our solution, the Gannet framework, allows IP core-based Heterogeneous Multicore SoCs to be programmed using a high-level language whilst preserving the full potential for parallelism and dynamic reconfigurability inherent in such a system. The required hardware infrastructure is small and low-latency, thus adding full dynamic reconfiguration capabilities with a small overhead both in area and performance.</ABSTRACT></RECORD></RECORDS></XML>