Programme

Wednesday

9:30-10:30	Registration & Coffee
10:30-11:30	Satnam Singh, Microsoft Research – Keynote
11:30-12:30	Khaled Benkrid, Edinburgh – Reconfigurable general purpose computing, has the time finally come?
12:30-14:00	Lunch
14:00-14:30	Thomas Perry, Xilinx – A dataflow framework for Xilinx system designs"
14:30-15:00	Wim Vanderbauwhede, Glasgow – MORA-C++, High-Level FPGA Programming through a Soft Processor Network
15:00-15:30	Coffee
15:30-16:15	John O’Donnell, Glasgow – Supporting Functional Arrays with Reconfigurable Hardware
16:15-17:00	Dan Ghica, Birmingham Geometry of Synthesis: Semantics-directed hardware compilation
17:00	Pub

9:30-10:15	Alastair Donaldson, Oxford – Automatic Analysis of Scratch-Pad Memory Code for Heterogeneous Multicore Processors
10:15-10:45	George Russell, Codeplay – Programming Heterogeneous Multicore Systems using Threading Building Blocks
10:45-11:15	Cofee
11:15-12:00	Ross Mcilroy, Microsoft Research – Hera-JVM: A Runtime System for Heterogeneous Multi-Core Architectures
12:00-12:30	Paul Keir, Glasgow – A Parallel Array Compiler for the Cell Broadband Engine
12:30-13:45	Lunch
13:45-14:15	Marcin Orczyk , Glasgow – Design and Implementation of a General Purpose Language for GPU Computations
14:15-14:45	Luke Cartey, Oxford – Implementing a Domain Specific Language for Hidden Markov Models on GPUs
14:45-15:15	Coffee
15:15-15:45	Mohamed Menaa, Birmingham – Compositional Round Abstraction
15:45-16:15	Ali Ahmadinia, Caledonian – High Level Modelling and Automated Generation of Heterogeneous SoC Architectures with Optimized Custom Reconfigurable Cores and On-Chip Communication Media
16:15-16:45	Hans-Wolfgang Loidl, Heriot-Watt University – Managing Cluster Heterogeneity in Glasgow parallel Haskell
16:45	End of workshop