| 0930 | Arrival, Coffee | SAWB L5 |
| 1000 | Peter Hsu (Oracle) | Keynote CAVA Computer: Exceptional Parallelism and Energy Efficiency [slides/pdf] |
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Designing a new computer system is a very expensive proposition. But 80% of it is exactly the same as every other computer—you need caches, multiprocessing, coherency protocols, memory systems, etc. Getting all of that right requires skill and experience, but is taken for granted and does not command much of a premium. Getting it wrong, on the other hand, is a commercial disaster. At Oracle Labs we have been developing a very energy efficient, highly parallel computer-the RAPID project. We are now starting to define a second generation project. In this talk I propose to standardize and open-source a design for the 80% that is the same in every design, so that everyone can concentrate on adding value to their own remaining 20%.
The CAVA computer is a "cluster in a rack" architecture targeting 10nm CMOS technology. The first part of the talk describes a 1024-node system where each node consists of 96-core, 3-issue out-of-order processor chips running at 1GHz with four DDR4 memory channels. Power estimates of different components are discussed, as well as cost projections. The second part of the talk discusses architectural tradeoffs that were made, how this architecture might play in the HPC exa-scale arena, and broader market implications. The talk concludes with a list of research topics that I and others at Oracle Labs are actively researching and would be interested in working with students at Universities. |
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| 1045 | Paul Harvey (Glasgow) | Ensemble VM |
| This talk describes a customised virtual machine for an actor-based programming language. The same machine is supported on a range of platforms, from embedded to parallel, without requiring application limitations, or recompilation. The VM presents equivalent or better performance when compared to equivalent systems for a range of domains. | ||
| 1115 | James Clarkson (Manchester) | Tornado: Runtime and Compiler Support For Hardware Acceleration in Java |
| The Tornado framework aims to provide Java developers with the ability to utilise modern hardware accelerators, such as GPGPUs and FPGAs. This talk briefly introduces the Tornado framework, it's current status and future direction. | ||
| 1135 | (commercial break) | |
| 1200 | Lunch | SAWB L4 |
| 1300 | Chris Seaton (Oracle) | Specialisation for Allocation Removal and Constant Folding [slides/pdf] |
| The best memory management strategy is to not allocate memory. Automatic partial escape analysis and allocation removal are effective, but the program has to be amenable to them for it work. We show how a self-optimising AST interpreter allows us to write elegant and simple code that specialises data structure layout and access routines to improve the success of allocation removal and constant folding. We demonstrate the impact that this has on real-world Ruby code. | ||
| 1330 | Kevin Hammond (St Andrews) | Kindergarten Cop [slides/pdf] |
| TBA. (with Vladimir Janjic) | ||
| 1400 | Edd Barrett (Kings) | Language Composition |
| Language composition allows programmers to write code in a mixture of different languages. On paper, this sounds ideal since it should allow us to choose the combination of languages that is best for the task at hand. In reality however, existent language compositions are limited to coarse foreign function interfaces (FFIs), and as a result language composition has not seen the widespread adoption that it perhaps deserves. In this talk I will discuss -- and offer solutions to -- the technical challenges involved in building fine-grained and high performance language compositions. | ||
| 1430 | Coffee break | |
| 1500 | Andy Nisbet (Manchester) | Project Beehive: A HW/SW Codesigned Stack for Runtime & Architecture Research using Maxine VM [slides/pdf] |
| This talk and accompanying short demos will provide an overview of current research work in the APT group at Manchester University that enables rapid experimentation and prototyping for system level HW/SW codesign for heterogeneous many-core systems comprised of GPUs, FPGAs and traditional cores with varying computer/power consumption characteristics such as ARM's big.LITTLE architecture. Profiling enhancements to Maxine VM that improve Graal optimizations, the Maxine VM ARMV7 port, an ARM dynamic binary instrumentation/optimization and simulation infrastructure will be discussed, presented and demoed. | ||
| 1530 | Ian Rogers (Google) | Keynote Best practices for writing error free garbage collectors [slides/pdf] |
| Garbage collectors are multithreaded, concurrent and complicated enough to have bugs. How can runtimes be designed such that the chance for bugs is minimized? How can we diagnose bugs after they've occurred? | ||
| 1615 | Workshop close | |