Designing Circuits Designing Circuits

Circuits from Truth Tables

In the first lecture we looked at the majority voting function, and constructed a logic circuit which computes that function. The function itself was defined by an English sentence, and I wrote down a logical expression and then a circuit by thinking about the ordinary meaning of the sentence.

In general we need a more systematic method of designing a logic circuit which computes a given logic function. We will again use majority voting as an example, but later on we will use the same techniques to design circuits for functions which are more relevant to computer design - for example, addition.

This time we will begin with the truth table for the majority voting function; it is a convenient way of specifying the function precisely.


x
y
z
r
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
1
1
1
By looking at the truth table we can see that for r to be 1, it must be the case that:

x = 0 and y = 1 and z = 1
or
x = 1 and y = 0 and z = 1
or
x = 1 and y = 1 and z = 0
or
x = 1 and y = 1 and z = 1

alternatively:

[`x] = 1 and y = 1 and z = 1
or
x = 1 and [`y] = 1 and z = 1
or
x = 1 and y = 1 and [`z] = 1
or
x = 1 and y = 1 and z = 1

alternatively:

[`x]yz = 1
or
x[`y]z = 1
or
xy[`z] = 1
or
xyz = 1

Rewriting one more time, we have discovered that


r =
x
 
yz + x
y
 
z + xy
z
 
+ xyz
which gives the following circuit.

w2l1p1.png

The expressions [`x]yz, x[`y]z etc. are called minterms. The formula for r above is said to be in sum of products form for obvious reasons.

If we are working with n variables (inputs to a logical function), it's clear that there are 2n possible minterms - each minterm involves all n variables, and each variable is either negated ([`x]) or not negated (just x).

Each minterm corresponds to one row of the truth table, i.e. to one combination of values (0 or 1) of the variables. The correspondence is straightforward: the minterm corresponds to the row in which the negated variables have value 0 and the non-negated variables have value 1.

For example, the minterm x[`y] [`z] corresponds to the row in which x = 1, y = 0 and z = 0.

The formula for r consists of the minterms corresponding to the truth table rows in which r = 1, OR ed together.

In this way, any truth table can be converted into a circuit with the same general structure as the one for majority voting. A truth table with m inputs and n rows with output value 1, generates a formula with n minterms involving m variables. The corresponding circuit consists of m NOT gates, n m-input AND gates, and one n-input OR gate. Depending on the hardware available, the multi-input gates can either be used directly or replaced by combinations of 2-input gates.

Notice that the circuit we have produced for the majority voting function is considerably more complex than the original circuit. We will have more to say about this later.

Example: Equality Test

Suppose we want to design a circuit which implements the equality test function on two inputs. That is, we want to compute r as a function of x and y, where r will be 1 if x and y have the same value, and 0 if x and y have different values.

For two variables there are 4 possible minterms, which correspond to the rows of the truth table as follows:


x
y
r
0
0
1

x
 
 
y
 
0
1
0

x
 
y
1
0
0
x
y
 
1
1
1
xy
The formula for r is the OR of the two minterms corresponding to the rows in which r = 1.


r =
x
 
 
y
 
+ xy
The circuit is

w2l1p2.png

Example: Parity

The parity of a binary word is determined by the number of 1s in it: if it contains an odd number of 1s then the parity is 1, otherwise the parity is 0.

(More generally, the parity of a number is odd or even.)

The parity function for a 3 bit word xyz is defined by the following truth table, which also shows the minterm for each row.


x
y
z
p
0
0
0
0

x
 
 
y
 
 
z
 
0
0
1
1

x
 
 
y
 
z
0
1
0
1

x
 
y
z
 
0
1
1
0

x
 
yz
1
0
0
1
x
y
 
 
z
 
1
0
1
0
x
y
 
z
1
1
0
0
xy
z
 
1
1
1
1
xyz
The formula for p is the OR of the four minterms corresponding to the rows in which p = 1.


p =
x
 
 
y
 
z +
x
 
y
z
 
+ x
y
 
 
z
 
+ xyz

Applications of Parity

Parity checking can be used for error detection, for example in computer memory.

Suppose that each memory location stores an 8 bit word. A memory device with parity checking would actually store 9 bits per word, where the 9th bit is the parity of the original 8 bit word. The parity bit is calculated when a value is stored in memory.

When a word is read from memory, its parity is calculated and compared with the parity bit. If a single bit within the word has been corrupted (i.e. had its value changed), for example as the result of an electrical fluctuation, a cosmic ray strike, or whatever, then the parity of the word no longer matches the parity bit, and an error can be reported.

The same idea can be used when transmitting data over a network.

Parity checking can only detect single bit errors, but it might be acceptable to assume that the probability of two errors in a single word is very small.

Parity checking cannot correct errors, because it is not possible to work out which bit was corrupted. In a networking application, the corrupted word would be retransmitted.

In applications where errors are more likely and must be corrected (for example, radio transmissions from spacecraft), various error correcting codes are available. Note that error correcting requires redundancy, so the use of error correcting codes always reduces the data transmission rate.

De Morgan's Laws

Two important laws relate AND and OR , via NOT . In our original notation:


NOT (x AND y)
=
(NOT x) OR (NOT y)
NOT (x OR y)
=
(NOT x) AND (NOT y)
In algebraic notation:



xy
 
=

x
 
+
y
 

x + y
 
=

x
 
 
y
 
De Morgan's laws can be remembered with the help of the phrase ``break the line and change the sign''.

In circuits:

w2l1p3.png

w2l1p4.png

De Morgan's laws can be verified by truth tables (Exercise).




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On 27 Jul 2001, 10:19.