Wk 7/8, Ch 9 – Instruction Selection

Matching m/c instructions onto Tree code

Maximal Munch algorithm

CISC vs. RISC

Instruction Selection & Register Allocation

Structuring in the Tiger compiler

Converting trees into m/c instrs

Trees are at a lower level than m/c instr

Many tree nodes can be captured in a single m/c instruction

Define mapping between each m/c instruction and tree fragment or pattern

Code generation involves

Tiling the tree with patterns

Non-overlapping tiling

Maximal Munch algorithm

Define all possible tree tiles for given m/c instruction set

Start at the root of the program tree

Find largest pattern that matches at the root

Cover root (and adjacent nodes possibly) with the tile – leaving several sub-trees

Recursively munch each sub-tree

Output code for this tile

Observations

Ensure that for each Tree node type

there is a single-node tile pattern

otherwise Max Munch could get stuck

Create new temporaries for the results of any particular node

CISC vs RISC

Number of patterns for a RISC is small

Writing Max Munch style algorithm relatively easy

Consider problems as the instructions become more complex…

Register allocation?

M.M. algorithm only specifies instruction, not the appropriate registers

Could do register allocation simultaneously…

but rather a waste since it is largely independent of any particular architecture

So, Reg Alloc before or after?

A note on Register Allocation

Requires liveness analysis

Determination of whether a particular value is still in use – still needed – still live

If not, the register holding it can be reused

Control-flow graph is constructed – paths in the graph show how registers are used

To determine liveness, only need to know whether, in a particular instruction, a register

is being used – reading the contained value

is being defined – setting the contained value

Assem class

Used to store assembly instructions – in a m/c independent way

All instructions are categorised into

OPER

Operation name, sources, destinations, targets

MOVE

Operation name, sources, destinations

Similar to OPER, but only for data transfer

LABEL

To represent targets

Using sources/desinations

Some instructions have implicit sources or destinations

E.g. CALL

Temporaries hold arguments

So they don’t appear in the assembly code

However they must be LIVE until the point of the call, and so are included in sources list of the call

Also, certain registers trashed – caller-saves

Mark these as destinations of the call – to signal that previous value no longer live

Tricks to avoid having a frame pointer

Assuming a fixed size frame – where the stack pointer stack pointer (SP) points at the end of the frame,

then for any reference to FP+k

FP + k == SP + k + Frame_Size

Note that Frame_Size not known here

But Assembly language constant name <frame_name>_Frame_Size can be used, and defined by final pass over the procedure code

Finally,

Details of SPIM, and the MIPS architecture can be found in

$TIGER/Tiger/Spim/Documentation

Or something like that

Either read over Chapter 9 or reread your notes before the lab session next week…




	Matching m/c instructions onto Tree code
	Maximal Munch algorithm
	CISC vs. RISC
	Instruction Selection & Register Allocation
	Structuring in the Tiger compiler


	Trees are at a lower level than m/c instr
		Many tree nodes can be captured in a single m/c instruction
	Define mapping between each m/c instruction and tree fragment or pattern
	Code generation involves
		Tiling the tree with patterns
		Non-overlapping tiling


	Define all possible tree tiles for given m/c instruction set
	Start at the root of the program tree
		Find largest pattern that matches at the root
		Cover root (and adjacent nodes possibly) with the tile – leaving several sub-trees
		Recursively munch each sub-tree
		Output code for this tile


	Ensure that for each Tree node type
		there is a single-node tile pattern
		otherwise Max Munch could get stuck
	Create new temporaries for the results of any particular node


	Number of patterns for a RISC is small
		Writing Max Munch style algorithm relatively easy
	Consider problems as the instructions become more complex…


	M.M. algorithm only specifies instruction, not the appropriate registers
	Could do register allocation simultaneously…
		but rather a waste since it is largely independent of any particular architecture
	So, Reg Alloc before or after?


	Requires liveness analysis
		Determination of whether a particular value is still in use – still needed – still live
		If not, the register holding it can be reused
	Control-flow graph is constructed – paths in the graph show how registers are used
	To determine liveness, only need to know whether, in a particular instruction, a register
		is being used – reading the contained value
		is being defined – setting the contained value


Used to store assembly instructions – in a m/c independent way
All instructions are categorised into
	OPER
		Operation name, sources, destinations, targets
	MOVE
		Operation name, sources, destinations
		Similar to OPER, but only for data transfer
	LABEL
		To represent targets


Some instructions have implicit sources or destinations
E.g. CALL
	Temporaries hold arguments
		So they don’t appear in the assembly code
		However they must be LIVE until the point of the call, and so are included in sources list of the call
	Also, certain registers trashed – caller-saves
		Mark these as destinations of the call – to signal that previous value no longer live


	Assuming a fixed size frame – where the stack pointer stack pointer (SP) points at the end of the frame,
	then for any reference to FP+k
		FP + k == SP + k + Frame_Size
	Note that Frame_Size not known here
		But Assembly language constant name <frame_name>_Frame_Size can be used, and defined by final pass over the procedure code


Details of SPIM, and the MIPS architecture can be found in
	$TIGER/Tiger/Spim/Documentation
		Or something like that
Either read over Chapter 9 or reread your notes before the lab session next week…