Conference Overview
| Time | Event |
|
Day 1: Thursday June 20, 2013
room: Seattle 3 | |
| 8:00 -- 8:45 | Breakfast |
| 8:45 -- 9:00 | Welcome from the chairs |
| 9:00 -- 10.00 | Keynote I |
| 10:00 -- 10:30 | Break |
| 10:30 -- 12:00 | Session 1: Safety and Reliability |
| 12:00 -- 13:30 | Lunch |
| 13:30 -- 15:00 | Session 2: Optimization |
| 15:00 -- 15:30 | Break |
| 15:30 -- 16:30 | Session 3: Performance Prediction and Testing |
|
Day 2: Friday June 21, 2013
room: Seattle 3 |
|
| 8:00 -- 9:00 | Breakfast |
| 9:00 -- 10:00 | Keynote II |
| 10:00 -- 10:30 | Break |
| 10:30 -- 12:00 | Session 4: New Storage Technologies |
| 12:00 -- 13:30 | Lunch |
| 13:30 -- 15:00 | Session 5: Scheduling and Design Space Exploration |
| 15:00 -- 15:30 | Break |
| 15:30 -- 16:30 | Session 6: Programming Language and Implementation |
Details:
HW/SW Co-designed Acceleration of Dynamic Languages
Youfeng Wu, Intel
The Role of C in the Dark Ages of Multi-Core
Marcel Beemster, ACE
Session 1: Safety and Reliability. (10.30am, Thu) Chair: Marcel Beemster, ACE
Low Cost Control Flow Protection Using Abstract Control Signatures
Daya Shanker Khudia, University of Michigan
Scott Mahlke, University of Michigan
Boosting Efficiency of Fault Detection and Recovery through Application-Specific Comparison and Checkpointing
Hao Chen, University of Delaware
Chengmo Yang, University of Delaware
A JVM for Soft-Error-Prone Embedded Systems
Isabella Stilkerich, FAU
Michael Strotz, FAU
Christoph Erhardt, FAU
Martin Hoffmann, FAU
Daniel Lohmann, FAU
Fabian Scheler, FAU
Wolfgang Schröder-Preikschat, FAU
Session 2: Optimization. (1.30pm, Thu) Chair: Youfeng Wu, Intel
Improving Processor Efficiency by Statically Pipelining Instructions
Ian Finlayson, University of Mary Washington
Brandon Davis, Florida State University
Peter Gavin, Florida State University
Gang-Ryung Uh, Boise State University
David Whalley, Florida State University
Magnus Sjalander, Florida State University
Gary Tyson, Florida State University
LUCAS: Latency-adaptive Unified Cluster Assignment and instruction Scheduling
Vasileios Porpodas, University of Edinburgh
Marcelo Cintra, University of Edinburgh
Practical Speculative Parallelization of Variable-Length Decompression Algorithms
Hakbeom Jang, Sungkyunkwan University
Channoh Kim, Sungkyunkwan University
Jae W. Lee, Sungkyunkwan University
Session 3: Performance Prediction and Testing. (3.30pm, Thu) Chair: Bruce Childers, University of Pittsburgh
Program Performance Spectrum
Sudipta Chattopadhyay, National University of Singapore
Lee Kee Chong, National University of Singapore
Abhik Roychoudhury, National University of Singapore
Non-Intrusive Program Tracing and Debugging of Deployed Embedded Systems Through Side-Channel Analysis
(best paper)
Carlos Moreno, University of Waterloo
Sebastian Fischmeister, University of Waterloo
Anwar Hasan, University of Waterloo
Session 4: New Storage Technologies. (10.30am, Fri) Chair: David Whalley, Florida State University
FTL^2: A Hybrid Flash Translation Layer with Logging for Write Reduction in Flash Memory
Tianzheng Wang, Department of Computer Science, University of Toronto
Duo Liu, Chongqing University
Yi Wang, The Hong Kong Polytechnic University
Zili Shao, The Hong Kong Polytechnic University
Compiler Directed Write-Mode Selection for High Performance Low Power Volatile PCM
Qingan Li, Wuhan University; City University of Hong Kong
Lei Jiang, University of Pittsburgh
Youtao Zhang, University of Pittsburgh
Yanxiang He, Wuhan University
Chun Xue, City University of Hong Kong
BLog: Block-level Log-block Management for NAND Flash Memory Storage Systems
Yong Guan, Capital Normal University
Guohui Wang, Capital Normal University
Yi Wang, Hong Kong Polytechnic University
Renhai Chen, Hong Kong Polytechnic University
Zili Shao, Hong Kong Polytechnic University
Session 5: Scheduling and Design Space Exploration. (1.30pm, Fri) Chair: Zili Shao, The Hong Kong Polytechnic University
A Two-step Optimization Technique for Functions Placement, Partitioning and Scheduling in Fixed-priority Distributed Systems
Asma Mehiaoui, CEA LIST DILS
Ernest Wozniak, CEA LIST DILS
Sara Tucci-Piergiovanni, CEA LIST DILS
Chokri Mraidha, CEA LIST DILS
Marco Di Natale, Scuola Superiore Sant'Anna
Haibo Zeng, McGill University
Jean-Philippe Babau, Lab-STICC, university of Brest
Laurent Lemarchand, Lab-STICC, university of Brest
Sébastien Gérard, CEA LIST DILS
Buffer Minimization in Earliest-Deadline First Scheduling of Dataflow Graphs
Adnan Bouakaz, University of Rennes 1/IRISA
Jean-Pierre Talpin, INRIA /IRISA
Automatic Dataflow Model Extraction from Modal Real-Time Stream Processing Applications
Stefan Geuns, University of Twente
Joost Hausmans, University of Twente
Marco Bekooij, NXP Semiconductors/University of Twente
Session 6: Programming Language and Implementation. (3.30pm, Fri) Chair: Jingling Xue, University of New South Wales
Portable Mapping of OpenMP to Multicore Embedded Systems Using MCA APIs
Cheng Wang, University of Houston
Sunita Chandrasekaran, University of Houston
Peng Sun, University of Houston
Jim Holt, Freescale Semiconductor Inc.
Barbara Chapman, University of Houston
Combined WCET Analysis of Bitcode and Machine Code using Control-Flow Relation Graphs
Benedikt Huber, Vienna University of Technology
Daniel Prokesch, Vienna University of Technology
Peter Puschner, Vienna University of Technology