José Cano Reyes

I am a Senior Lecturer (Associate Professor) in the School of Computing Science at the University of Glasgow, where I lead the Glasgow Intelligent Computing Lab (gicLAB) and I am deputy Head of the GLAsgow Systems Section (GLASS). Previously, I was a Postdoctoral Research Associate (January 2014 - August 2018) with the CArD Group at the Institute for Computing Systems Architecture (ICSA) in the School of Informatics at The University of Edinburgh, where I led the systems research of the H2020 BONSEYES project and the EPSRC AnyScale Applications project. I joined the ARCO Research Group in the Department of Computer Achitecture at Universitat Politecnica de Catalunya - BarcelonaTech in March 2012, where I was a Postdoctoral Researcher until Dec 2013. I received the Engineering and Ph.D. degrees in Computer Science from Universitat Politecnica de Valencia in Sept 2004 and Feb 2012, respectively. I was a member with the Networking Research Group (Sept 2005 - Feb 2012) and also with the Parallel Architectures Group (Dec 2009 - Feb 2012) in the Department of Computing Engineering at Universitat Politecnica de Valencia.

I'm always looking for prospective PhD students with good programming skills (C++, Python) and background/interest in one or more of the following areas: Computer Architecture, Compilers, Edge Computing, Machine Learning and Security. If you are interested, please send me an email including your CV. Information about the application process is here.

Contact Information

University of Glasgow
School of Computing Science
Sir Alwyn Williams Building, Room S154
18 Lilybank Gardens
Glasgow G12 8RZ
Scotland, United Kingdom
Tel: +44 (0) 141 330 1640
E-mail: Jose.CanoReyes@glasgow.ac.uk

Research

I lead the Glasgow Intelligent Computing Laboratory (gicLAB) in the School of Computing Science at the University of Glasgow.

Currently, I'm Principal Investigator at the University of Glasgow on the EU's Horizon Europe project dAIEDGE, and Co-Investigator on the EPSRC project IDEAL, and the UKRI "Digital Security by Design" projects AppControl and Morello-HAT. I was Principal Investigator on the EPSRC PETRAS project MAISE (Multimodal AI-based Security at the Edge).

My research interests are in the broad areas of: Computer Architecture, Computer Systems, Compilers, Machine Learning and Security.

My current research is focused on:

• EdgeAI: Hardware-software co-design approaches for efficient deployment and execution of AI applications on mobile/embedded edge devices.
  
• Acceleration of Machine Learning training.
  
• Acceleration of Fully Homomorphic Encrypted DNNs.
  
• Resilience of Artificial Intelligence and Machine Learning models on IoT-scale devices.
  
• Digital Security by Design for Mission-Critical Systems-on-Chip.
  

Teaching

Lecturer

• Spring 2020 - 2025 Computer Systems (Year 1), School of Computing Science, University of Glasgow.
  
• Autumn 2019 - 2025 Computer Architecture (Year 4), School of Computing Science, University of Glasgow.
  
• Spring 2019 Operating Systems (Year 3), School of Computing Science, University of Glasgow.
  
• Spring 2019 Further Programming (Year 1), School of Computing Science, University of Glasgow.
  

Guest Lecturer

• Autumn 2017 Compiling Techniques (Year 3), School of Informatics, University of Edinburgh.
  

Assistant/Tutor

• Spring 2018 Internet of Things: Systems, Security and the Cloud (Year 4), School of Informatics, University of Edinburgh.
  
• Autumn 2014 - 2017 Introduction to Computer Systems (Year 2), School of Informatics, University of Edinburgh.
  
• Spring 2015, 2017 Computer Architecture (Year 3), School of Informatics, University of Edinburgh.
  

Publications

Journal articles (selected)

• DLAS: A Conceptual Model for Across-Stack Deep Learning Acceleration. [Publisher]
  P. Gibson, J. Cano, E. J. Crowley, A. Storkey, M. O'Boyle.
  ACM Transactions on Architecture and Code Optimization (TACO), March 2025.

• SECDA-TFLite: A Toolkit for Efficient Development of FPGA-based DNN Accelerators for Edge Inference. [Publisher]
  J. Haris, P. Gibson, J. Cano, N. Bohm Agostini, D. Kaeli.
  Elsevier Journal of Parallel and Distributed Computing (JPDC), Volume 173, March 2023.

• Spartan: A Sparsity-Adaptive Framework to Accelerate Deep Neural Network Training on GPUs. [Paper]
  S. Dong, Y. Sun, N. Bohm Agostini, E. Karimi, D. Lowell, J. Zhou, J. Cano, J. L. Abellán, D. Kaeli.
  IEEE Transactions on Parallel and Distributed Systems (TPDS), Volume 32, Issue 10, October 2021.

• Solving the Task Variant Allocation Problem in Distributed Robotics. [Paper]
  J. Cano, D. R. White, A. Bordallo, C. McCreesh, A. L. Michala, J. Singer, V. Nagarajan.
  Springer Autonomous Robots (AURO), Volume 42, April 2018.

• Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead. [Paper]
  J. Cano, J. Flich, A. Roca, J. Duato, M. Coppola, R. Locatelli.
  IEEE Transactions on Computers (TC), Volume 63, Issue 3, March 2014.

• EasyMANET: An Extensible and Configurable Platform for Service Provisioning in MANET Environments. [Publisher]
  J. Cano, J.-C. Cano, C.-K. Toh, C. T. Calafate, P. Manzoni.
  IEEE Communications Magazine (CM), Volume 48, Issue 12, December 2010.

Conference papers

• Accelerating Transposed Convolutions on FPGA-based Edge Devices (To appear)
  J. Haris, J. Cano
  35th International Conference on Field-Programmable Logic and Applications (FPL), Leiden, The Netherlands, September 2025.

• ICE-Pruning: An Iterative Cost-Efficient Pruning Pipeline for Deep Neural Networks. [Paper]
  W. Hu, P. Henderson, J. Cano
  International Joint Conference on Neural Networks (IJCNN), Rome, Italy, July 2025.

• FetaFix: Automatic Fault Localization and Repair of Deep Learning Model Conversions. [Paper]
  N. Louloudakis, P. Gibson, J. Cano, A. Rajan
  International Conference on Evaluation and Assessment in Software Engineering (EASE), Istanbul, Turkey, June 2025.

• Biases in Edge Language Models: Detection, Analysis, and Mitigation. [Paper]
  V. Sharma, D. Pau, J. Cano.
  EDGE AI Research Symposium (EDGEAI) Austin, Texas, USA, February 2025.

• Accelerating PoT Quantization on Edge Devices. [Paper]
  R. Saha, J. Haris, J. Cano.
  31st IEEE International Conference on Electronics Circuits and Systems (ICECS), Nancy, France, November 2024.

• Efficient Tiny Machine Learning for Human Activity Recognition on Low-Power Edge Devices. [Paper]
  V. Sharma, D. Pau, J. Cano.
  IEEE Research and Technologies for Society and Industry (RTSI), Lecco, Italy, September 2024.

• AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators. [Paper]
  N. Bohm Agostini, J. Haris, P. Gibson, M. Jayaweera, N. Rubin, Antonino Tumeo, J. L. Abellán, J. Cano, D. Kaeli.
  IEEE/ACM International Symposium on Code Generation and Optimization (CGO), Edinburgh, UK, March 2024.

• DeltaNN: Assessing the Impact of Computational Environment Parameters on the Performance of Image Recognition Models. [Paper]
  N. Louloudakis, P. Gibson, J. Cano, A. Rajan
  39th IEEE International Conference on Software Maintenance and Evolution (ICSME) Industry Track, Bogotá, Colombia, October 2023.

• Fault Localization for Buggy Deep Learning Framework Conversions in Image Recognition. [Paper]
  N. Louloudakis, P. Gibson, J. Cano, A. Rajan
  38th IEEE/ACM International Conference on Automated Software Engineering (ASE) NIER track, Kirchberg, Luxembourg, September 2023.

• Improving Robustness Against Adversarial Attacks with Deeply Quantized Neural Networks. [Paper]
  F. Ayaz, I. Zakariyya, J. Cano, S. L. Keoh, J. Singer, D. Pau, M. Kharbouche-Harrari
  International Joint Conference on Neural Networks (IJCNN), Gold Coast, Australia, June 2023.

• Transfer-Tuning: Reusing Auto-Schedules for Efficient Tensor Program Code Generation. [Paper] [Code]
  P. Gibson, J. Cano
  31st International Conference on Parallel Architectures and Compilation Techniques (PACT), Chicago, USA, October 2022.

• Bifrost: End-to-End Evaluation and Optimization of Reconfigurable DNN Accelerators. [Paper] [Code]
  A. Stjerngren, P. Gibson, J. Cano.
  IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Singapore, May 2022.

• SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelerators for Edge Inference. [Paper] [Code]
  J. Haris, P. Gibson, J. Cano, N. Bohm Agostini, D. Kaeli.
  33rd IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Belo Horizonte, Brazil, October 2021.

• Design Space Exploration of Accelerators and End-to-End DNN Evaluation with TFLITE-SOC. [Paper]
  N. Bohm Agostini, S. Dong, E. Karimi, M. Torrents, J. Cano, J. L. Abellán, D. Kaeli.
  32nd IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Porto, Portugal, September 2020.

• Orpheus: A New Deep Learning Framework for Easy Deployment and Evaluation of Edge Inference. [Paper]
  P. Gibson, J. Cano.
  IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Virtual Meeting, August 2020.

• Optimizing Grouped Convolutions on Edge Devices. [Paper] [Code]
  P. Gibson, J. Cano, J. Turner, E. J. Crowley, M. O'Boyle, A. Storkey.
  31st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Manchester, UK, July 2020.

• Performance Aware Convolutional Neural Network Channel Pruning for Embedded GPUs. [Paper]
  V. Radu, K. Kaszyk, Y. Wen, J. Turner, J. Cano, E. J. Crowley, B. Franke, A. Storkey, M. O'Boyle.
  IEEE International Symposium on Workload Characterization (IISWC), Orlando, Florida, USA, November 2019.

• Automatic Parameter Tuning of Motion Planning Algorithms. [Paper]
  J. Cano, Y. Yang, B. Bodin, V. Nagarajan, M. O'Boyle.
  IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), Madrid, Spain, October 2018.

• Characterising Across-Stack Optimisations for Deep Convolutional Neural Networks. [Paper]
  J. Turner, J. Cano, V. Radu, E. J. Crowley, M. O'Boyle, A. Storkey.
  IEEE International Symposium on Workload Characterization (IISWC), Raleigh, North Carolina, USA, September 2018.

• HW/SW Co-designed Processors: Challenges, Design Choices and a Simulation Infrastructure for Evaluation. [Paper]
  R. Kumar, J. Cano, A. Brankovic, D. Pavlou, K. Stavrou, E. Gibert, A. Martínez, A. González.
  IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Santa Rosa, California, USA, April 2017.

• Automatic configuration of ROS applications for near-optimal performance. [Paper] [Poster]
  J. Cano, A. Bordallo, V. Nagarajan, S. Ramamoorthy, S. Vijayakumar.
  IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), Deajeon, Korea, October 2016.

• Quantitative Characterization of the Software Layer of a HW/SW Co-Designed Processor. [Paper]
  J. Cano, R. Kumar, A. Brankovic, D. Pavlou, K. Stavrou, E. Gibert, A. Martínez, A. González.
  IEEE International Symposium on Workload Characterization (IISWC), Providence, Rhode Island, USA, September 2016.

• Task Variant Allocation in Distributed Robotics. [Paper] [Poster] [Code]
  J. Cano, D. White, A. Bordallo, C. McCreesh, P. Prosser, J. Singer, V. Nagarajan.
  Robotics: Science and Systems Conference (RSS), Ann Arbor, USA, June 2016.

• Dynamic process migration in heterogeneous ROS-based environments. [Paper] [Video]
  J. Cano, E. Molinos, V. Nagarajan, S. Vijayakumar.
  17th IEEE International Conference on Advanced Robotics (ICAR), Istanbul, Turkey, July 2015.

• Transient and Permanent Error Control for High End Multiprocessor Systems-on-Chip. [Paper]
  Q. Yu, J. Cano, J. Flich, P. Ampadu.
  6th ACM/IEEE International Symposium on Networks-on-Chip (NOCS), Lyngby, Denmark, May 2012.

• Efficient Routing Implementation in Complex Systems-on-Chip Designs. [Paper]
  J. Cano, J. Flich, J. Duato, M. Coppola, R. Locatelli.
  5th ACM/IEEE International Symposium on Networks-on-Chip (NOCS), Pittsburgh, USA, May 2011.

• Spidergon STNoC Design Flow. [Publisher]
  F. Dubois, J. Cano, M. Coppola, J. Flich, F. Petrot.
  5th ACM/IEEE International Symposium on Networks-on-Chip (NOCS), Pittsburgh, USA, May 2011.

• A MANET autoconfiguration system based on Bluetooth technology. [Publisher]
  J. Cano, E. Burgoa, C. T. Calafate, J.-C. Cano, P. Manzoni.
  3rd IEEE International Symposium on Wireless Communication Systems (ISWCS), Valencia, Spain, September 2006.

• On the design of pervasive computing applications based on Bluetooth and a P2P concept. [Publisher]
  J.-C. Cano, J. Cano, P. Manzoni, D. Kim.
  1st IEEE International Symposium on Wireless Pervasive Computing (ISWPC), Phuket, Thailand, January 2006.

• On the Design of Spontaneous Networks Using a P2P Approach and Bluetooth. [Publisher]
  J. Cano, J.-C. Cano, P. Manzoni, D. Ferrández.
  10th IEEE Symposium on Computers and Communications (ISCC), Cartagena, Spain, June 2005.

Workshop papers

• SECDA Design Suite: Efficient Hardware-Software Co-Design of DNN Accelerators (To appear)
  J. Haris, J. Cano
  4th Workshop on Open-Source Computer Architecture Research (OSCAR), co-located with ISCA, Tokyo, Japan, June 2025.

• F-BFQ: Flexible Block Floating-Point Quantization Accelerator for LLMs (To appear)
  J. Haris, J. Cano
  Workshop on New Approaches for Addressing the Computing Requirements of LLMs and GNSs (ARC-LG), co-located with ISCA, Tokyo, Japan, June 2025.

• Exploiting Unstructured Sparsity in Fully Homomorphic Encrypted DNNs. [Paper]
  A. Ferguson, P. Gibson, L. D'Agata, P. McLeod, F. Yaman, A. Das, I. Colbert, J. Cano, A. Rajan
  5th Workshop on Machine Learning and Systems (EuroMLSys) co-located with EuroSys'25, Rotterdam, The Netherlands, March-April 2025.

• Decoupling Structural and Quantitative Knowledge in ReLU-based Deep Neural Networks. [Paper]
  J. Duato, J. Mestre, M. Dolz, E. S. Quintana-Orti, J. Cano
  5th Workshop on Machine Learning and Systems (EuroMLSys) co-located with EuroSys'25, Rotterdam, The Netherlands, March-April 2025.

• Exploring Robustness of Image Recognition Models on Hardware Accelerators. [Paper]
  N. Louloudakis, P. Gibson, J. Cano, A. Rajan
  Mutation Workshop (Mutation) co-located with ICST, Naples, Italy, March-April 2025.

• DQA: An Efficient Method for Deep Quantization of Deep Neural Network Activations. [Paper]
  W. Hu, P. Henderson, J. Cano
  Machine Learning with new Compute Paradigms Workshop (MLNCP) co-located with NeurIPS, Vancouver, Canada, December 2024.

• Designing Efficient LLM Accelerators for Edge Devices [Paper]
  J. Haris, R. Saha, W. Hu, J. Cano
  Workshop on New Approaches for Addressing the Computing Requirements of LLMs and GNSs (ARC-LG), co-located with ISCA, Buenos Aires, Argentina, June 2024.

• Data Transfer Optimizations for Host-CPU and Accelerators in AXI4MLIR. [Paper]
  J. Haris, N. Bohm Agostini, A. Tumeo, D. Kaeli, J. Cano
  5th Compilers for Machine Learning Workshop (C4ML) co-located with CGO, Edinburgh, UK, March 2024.

• ICE-Pick: Iterative Cost-Efficient Pruning for DNNs. [Paper]
  W. Hu, P. Gibson, J. Cano
  Neural Compression Workshop (NCW) co-located with ICML, Honolulu, Hawai, USA, July 2023.

• Assessing Robustness of Image Recognition Models to Changes in the Computational Environment. [Paper]
  N. Louloudakis, P. Gibson, J. Cano, A. Rajan
  NeurIPS ML Safety Workshop (MLSW) co-located with NeurIPS, Hybrid Conference, November-December 2022.

• Productive Reproducible Workflows for DNNs: A Case Study for Industrial Defect Detection. [Paper]
  P. Gibson, J. Cano
  4th Workshop on Accelerated Machine Learning (AccML) co-located with HiPEAC, Budapest, Hungary, June 2022.

• Optimizing Data Processing in Space for Object Detection in Satellite Imagery. [Paper]
  M. Lofqvist, J. Cano
  Workshop at 35th Annual Small Satellite Conference (SmallSat), Virtual Event, August 2021.

• Accelerating Deep Learning Applications in Space. [Paper]
  M. Lofqvist, J. Cano
  Workshop at 34th Annual Small Satellite Conference (SmallSat), Virtual Event, August 2020.

• Optimising Convolutional Neural Networks Inference on Low-Powered GPUs. [Paper]
  S. Rovder, J. Cano, M. O'Boyle.
  12th International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG) co-located with HiPEAC, Valencia, Spain, January 2019.

• Accelerating Deep Neural Networks on Low Power Heterogeneous Architectures. [Paper]
  M. Loukadakis, J. Cano, M. O'Boyle.
  11th International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG) co-located with HiPEAC, Manchester, United Kingdom, January 2018.

• Solving the User-to-Host Binding Problem in Ad Hoc Networks Through Photo-IDs. [Paper]
  J. Cano, J.-C. Cano, C. T. Calafate, P. Manzoni.
  4th ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, Sensor, and Ubiquitous Networks (PE-WASUN) co-located with MSWiM, Chania, Greece, October 2007.

arXiv

• Quantitative Analysis of Deeply Quantized Tiny Neural Networks Robust to Adversarial Attacks. [Paper]
  I. Zakariyya, F. Ayaz, M. Kharbouche-Harrari, J. Singer, S. L. Keoh, D. Pau, J. Cano
  arXiv preprint, March 2025.

• Exploring Effects of Computational Parameter Changes to Image Recognition Systems. [Paper]
  N. Louloudakis, P. Gibson, J. Cano, A. Rajan
  arXiv preprint, October 2022.

• Distilling with Performance Enhanced Students. [Paper]
  J. Turner, E. J. Crowley, V. Radu, J. Cano, M. O'Boyle, A. Storkey.
  arXiv preprint, March 2019.

Books, Edited books and Book chapters

• Euro-Par 2023: Parallel Processing. [Publisher]
  J. Cano, M. D. Dikaiakos, G. A. Papadopoulos, M. Pericàs, R. Sakellariou
  Proceedings of the 29th International Conference on Parallel and Distributed Computing (Euro-Par), Limassol, Cyprus, August 28 - September 1, 2023.

• Euro-Par 2022: Parallel Processing. [Publisher]
  J. Cano, P. Trinder.
  Proceedings of the 28th International Conference on Parallel and Distributed Computing (Euro-Par), Glasgow, UK, August 22-26, 2022.

• Bringing Mobile Ad Hoc Networks to the Masses. An essay on autoconfiguration and service discovery. [Publisher]
  J. Cano.
  Lambert Academic Publishing, March 2012.

• Experiences in Developing Ubiquitous Applications. [Publisher]
  J. Cano, J.-C. Cano, C. T. Calafate, P. Manzoni.
  Designing Solutions-Based Ubiquitous and Pervasive Computing: New Issues and Trends, April 2010.

• Deploying Pervasive Technologies. [Publisher]
  J.-C. Cano, C. T. Calafate, J. Cano, P. Manzoni.
  Encyclopedia of Information Science and Technology, Second edition, October 2008.

Other publications

• Hardware/Software Co-Design of Edge DNN Accelerators with TFLite. [Paper]
  J. Haris, P. Gibson, J. Cano, N. Bohm Agostini, D. Kaeli.
  18th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Fiuggi, Italy, July 2022.

• Hardware Acceleration of Deep Neural Networks on Edge Devices with FPGAs. [Paper]
  J. Haris, J. Cano.
  16th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Online Event, July 2020.

• Evaluating Grouped Spatial Pack Convolutions on Edge CPUs. [Paper]
  P. Gibson, J. Cano.
  16th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Online Event, July 2020.

• Staircase: Distilling with Performance Enhanced Students for Hardware. [Poster]
  J. Turner, E. J. Crowley, V. Radu, J. Cano, A. Storkey M. O'Boyle.
  ARM Research Summit, Austin, USA, September 2019.

• Accelerating Deep Convolutional Neural Networks on Low Power Embedded Devices. [Poster]
  J. Cano, J. Turner, V. Radu, M. O'Boyle.
  ARM Research Summit, Cambridge, UK, September 2018.

• HW/SW Co-designed Processors: Challenges, Design Choices and a Simulation Infrastructure for Evaluation. [Poster]
  J. Cano, R. Kumar, A. Brankovic, D. Pavlou, K. Stavrou, E. Gibert, A. Martínez, A. González.
  ARM Research Summit, Cambridge, UK, September 2017.

• Modelling HW/SW Co-Designed Processors. [Paper] [Poster]
  J. Cano, A. Brankovic, R. Kumar, D. Zivanovic, D. Pavlou, K. Stavrou, E. Gibert, A. Martínez, G. Dot, F. Latorre, A. Barceló, A. González.
  8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Fiuggi, Italy, July 2012.

• Mapping Irregular MPSoC Topologies onto 2D-meshes. [Paper] [Poster]
  J. Cano, J. Flich, J. Duato, M. Coppola, R. Locatelli.
  7th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Fiuggi, Italy, July 2011.

Supervision

Postdocs

• Jude Haris, University of Glasgow, 10/2024 - Present
  Project: dAIEDGE (A network of excellence for distributed, trustworthy, efficient and scalable AI at the Edge)

• Perry Gibson, University of Glasgow, 10/2023 - 08/2024
  Project: dAIEDGE (A network of excellence for distributed, trustworthy, efficient and scalable AI at the Edge)

• Idris Zakariyya, University of Glasgow, 11/2022 - 08/2023
  Project: MAISE (Multimodal AI-based Security at the Edge)

• Ferheen Ayaz, University of Glasgow, 11/2021 - 08/2022
  Project: MAISE (Multimodal AI-based Security at the Edge)

PhD Students

• Vinamra Sharma, University of Glasgow, (Starting October 2025)
  Topic: "Transfer Learning for Adaptive Compiler Optimization on Edge Devices"

• Xingjian Fu, University of Glasgow, 01/2025 - Present
  Topic: "Vision Transformer Acceleration based on FPGAs"

• Hubert Dymarkowski, University of Glasgow, 10/2024 - Present
  Topic: "Specialized Accelerators for AI/ML applications"

• Omodolapo Victor Babalola, University of Glasgow, co-supervised with Nguyen Truong, 10/2024 - Present
  Topic: "Robust Privacy-Preserving Federated Learning for securing IoT"

• Kenneth Goh Gek Chuah, University of Glasgow, co-supervised with Chee Kiat Seow and Qi Cao, 06/2024 - Present
  Topic: "On-Device Learning for IoT Smart Devices in Energy Applications"

• Kai Feng, University of Glasgow, co-supervised with Jeremy Singer, 10/2023 - Present
  Topic: "Early detection of zero-day exploits in Industrial Control Systems"

• Rappy Saha, University of Glasgow, 10/2022 - Present
  Topic: "Optimizing Deep Neural Networks Inference on FPGAs"

• Wenhao Hu, University of Glasgow, 10/2021 - Present
  Topic: "Exploring Novel Pruning Techniques for Deep Neural Networks"

• Nick Louloudakis, University of Edinburgh, co-supervised with Ajitha Rajan, 06/2021 - 06/2024
  Thesis: "Testing Deep Neural Networks Across Different Computational Configurations"

• Jude Haris, University of Glasgow, 10/2020 - 09/2024
  Thesis: "Hardware-Software Co-Design of FPGA-based Neural Network Accelerators for Edge Inference"

• Perry Gibson, University of Glasgow, 10/2019 - 09/2023
  Thesis: "Compiler-centric Across-stack Deep Learning Acceleration"

MSci/MSc/Undergraduate Students (selected)

• Lara D'Agata (MSci), University of Glasgow, 2025
  Thesis: "Optimising the Algorithmic Complexity of Matrix Multiplication for Fully Homomorphic Encryption"

• Mariusz Szczepaniak (MSci), University of Glasgow, 2025
  Thesis: "SECDA-sparsity: An approach to Improve the Efficiency of the SECDA Methodologys"

• Jamie Robb (UG), University of Glasgow, 2025
  Thesis: "Developing Trigger Inputs for Black-Box Object Detector Watermarking in Real-World Scenarios"

• Zoltan Zrupko (MSc), University of Glasgow, 2024
  Thesis: "Evaluation of Quantization and Pruning for Accelerated FHE-DNN Inference"

• Hubert Dymarkowski (MSci), University of Glasgow, 2024
  Thesis: "Designing FPGA-based Accelerators for Vision Transformers on Edge devices"

• Vinamra Sharma (MSc), University of Glasgow, 2023
  Thesis: "On-device Learning in the Context of Healthcare Monitoring"

• Axel Stjerngren (UG), University of Glasgow, 2021
  Thesis: "Bifrost: End to End Evaluation and Optimisation Of Neural Network Accelerators"

• Martina Lofqvist (UG), University of Glasgow, 2020
  Thesis: "Deep Learning Applications in Space"

• Simon Rovder (MSc), University of Edinburgh, co-supervised with Michael O'Boyle, 2018
  Thesis: "Optimising Neural Network Inference on Low-Powered GPUs"

• Manolis Loukadakis (MSc), University of Edinburgh, co-supervised with Michael O'Boyle, 2017
  Thesis: "Deep Learning on Low Power GPUs"

Service

Organising Committee

• 2025 IEEE International Symposium on Workload Characterization (IISWC), 2025
  
• 23rd International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar), co-located with Euro-Par, 2025
  
• ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2025
  
• 7th Workshop on Accelerated Machine Learning (AccML), co-located with HiPEAC, 2025
  
• 1st International Workshop on Low Carbon Computing (LOCO), 2024
  
• 17th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-57, 2024
  
• 16th Workshop on General Purpose Processing Using GPU (GPGPU), co-located with PPoPP, 2024
  
• 6th Workshop on Accelerated Machine Learning (AccML), co-located with HiPEAC, 2024
  
• 29th International European Conference on Parallel and Distributed Computing (Euro-Par), 2023
  
• 5th Workshop on Accelerated Machine Learning (AccML), co-located with HiPEAC, 2023
  
• 4th Workshop on Distributed and Heterogeneous Programming in C++ (DHPCC++), co-located with Euro-Par, 2022
  
• 28th International European Conference on Parallel and Distributed Computing (Euro-Par), 2022
  
• 4rd Workshop on Accelerated Machine Learning (AccML), co-located with HiPEAC, 2022
  
• 3rd Workshop on Accelerated Machine Learning (AccML), co-located with HiPEAC, 2021
  
• 2nd Workshop on Accelerated Machine Learning (AccML), co-located with ISCA, 2020
  
• 1st Workshop on Accelerated Machine Learning (AccML), co-located with HiPEAC, 2020
  
• Workshop on Emerging Deep Learning Accelerators (EDLA), co-located with HiPEAC, 2019
  
• ACM International Conference on Computing Frontiers (CF), 2018
  
• 1st Workshop on Novel Exascale Systems / Rack-Scale Memory Systems and Models (NovExS-RAMbO), co-located with HiPEAC, 2017
  

Technical Program Committee

• 5th Workshop on Machine Learning and Systems (EuroMLSys), co-located with EuroSys, 2025
  
• 2025 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2025
  
• 42nd IEEE International Conference on Computer Design (ICCD) - Hardware Architectures Track Chair, 2024
  
• 31st IEEE International Conference on Electronics Circuits and Systems (ICECS) - Microsystems and Embedded Systems Track Chair, 2024
  
• 5th Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM), co-located with ECML PKDD, 2024
  
• 57th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2024
  
• 9th Workshop on Energy Efficient Machine Learning and Cognitive Computing (EMC2), co-located with ASPLOS, 2024
  
• Workshop on New Approaches for Addressing the Computing Requirements of LLMs and GNSs (ARC-LG), co-located with ISCA, 2024
  
• 27th Euromicro Conference Series on Digital System Design (DSD), 2024
  
• 21st ACM International Conference on Computing Frontiers (CF), 2024
  
• 4th Workshop on Machine Learning and Systems (EuroMLSys), co-located with EuroSys, 2024
  
• 30th International European Conference on Parallel and Distributed Computing (Euro-Par), 2024
  
• 27th Design, Automation and Test in Europe Conference (DATE) - Topic E4, 2024
  
• 30th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024
  
• 4th Workshop on Distributed Machine Learning (DistributedML), co-located with CoNEXT, 2023
  
• 16th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-56, 2023
  
• 41th IEEE International Conference on Computer Design (ICCD) - Processor Architecture Track Chair, 2023
  
• 17th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2023
  
• International Workshop on Performance Analysis of Machine Learning Systems (FastPath), co-located with ISPASS, 2023
  
• 26th Euromicro Conference Series on Digital System Design (DSD) - AAMTM Special Session, 2023
  
• 32rd International Conference on Parallel Architectures and Compilation Techniques (PACT), 2023
  
• IEEE International Conference on Omni-layer Intelligent Systems (COINS), 2023
  
• 20th ACM International Conference on Computing Frontiers (CF), 2023
  
• 3rd Workshop on Machine Learning and Systems (EuroMLSys), co-located with EuroSys, 2023
  
• 34th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2023
  
• 26th Design, Automation and Test in Europe Conference (DATE) - Topic E4, 2023
  
• 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023
  
• 3rd Workshop on Distributed Machine Learning (DistributedML), co-located with CoNEXT, 2022
  
• 15th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-53, 2022
  
• 40th IEEE International Conference on Computer Design (ICCD), 2022
  
• 16th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2022
  
• 31st International Conference on Parallel Architectures and Compilation Techniques (PACT), 2022
  
• 33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2022
  
• 2st Workshop on Machine Learning and Systems (EuroMLSys), co-located with EuroSys, 2022
  
• 25th Design, Automation and Test in Europe Conference (DATE) - Topic E4, 2022
  
• 2nd Workshop on Distributed Machine Learning (DistributedML), co-located with CoNEXT, 2021
  
• 14th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-53, 2021
  
• 15th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2021
  
• 30th International Conference on Parallel Architectures and Compilation Techniques (PACT), 2021
  
• 1st Workshop on Machine Learning and Systems (EuroMLSys), co-located with EuroSys, 2021
  
• IEEE Consumer Communications and Networking Conference (CCNC 2021), 2021
  
• 1st Workshop on Distributed Machine Learning (DistributedML), co-located with CoNEXT, 2020
  
• 13th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-53, 2020
  
• 11th IEEE International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), co-located with SC, 2020
  
• IEEE International Symposium on Workload Characterization (IISWC), 2020
  
• 32nd IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2020
  
• 12th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-52, 2019
  
• 6th IEEE/ACM International Conference on Big Data Computing, Applications and Technologies (BDCAT), 2019
  
• 14th IEEE International Conference on Networking, Architecture, and Storage (NAS), 2019
  
• 48th International Conference on Parallel Processing (ICPP), 2019
  
• International Workshop on Modeling and Simulation of Parallel and Distributed Systems (MSPDS), co-located with HPCS, 2019
  
• 4th IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB), co-located with HPCA, 2019
  
• 11th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-51, 2018
  
• 13th IEEE International Conference on Networking, Architecture, and Storage (NAS), 2018
  
• 11th IEEE International Conference on Internet of Things (iThings), 2018
  
• 1st International Workshop on Next Generation Clouds (NextGenClouds), co-located with ICPP, 2018
  
• 7th International Workshop on Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA), co-located with ICPP, 2018
  
• 47th International Conference on Parallel Processing (ICPP), 2018
  
• 20th IEEE International Conference on High Performance Computing and Communications (HPCC), 2018
  
• 16th IEEE International Conference on Pervasive Intelligence and Computing (PICom), 2018
  
• ACM International Conference on Computing Frontiers (CF), 2018
  
• 2nd Workshop on Pioneering Processor Paradigms (WP3), co-located with HPCA, 2018
  
• 4th IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB), co-located with HPCA, 2018
  
• 8th IEEE International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), co-located with SC, 2017
  
• 10th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-50, 2017
  
• 15th IEEE International Conference on Pervasive Intelligence and Computing (PICom), 2017
  
• 12th IEEE International Conference on Networking, Architecture, and Storage (NAS), 2017
  
• 6th International Workshop on Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA), co-located with ICPP, 2017
  
• International Workshop on Modeling and Simulation of Parallel and Distributed Systems (MSPDS), co-located with HPCS, 2017
  
• 10th IEEE International Conference on Internet of Things (iThings), 2017
  
• ACM International Conference on Computing Frontiers (CF), 2017
  
• 3rd IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB), co-located with HPCA, 2017
  
• International Workshop on Code OptimiSation for Multi and Many Cores (COSMIC), co-located with CGO, 2017
  
• 1st Workshop on Pioneering Processor Paradigms (WP3), co-located with HPCA, 2017
  
• 7th IEEE International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), co-located with SC, 2016
  
• 9th International Workshop on Network on Chip Architectures (NoCArc), co-located with MICRO-49, 2016
  
• 5th International Workshop on Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA), co-located with ICPP, 2016
  
• 14th IEEE International Conference on Pervasive Intelligence and Computing (PICom), 2016
  
• International Workshop on Modeling and Simulation of Parallel and Distributed Systems (MSPDS), co-located with HPCS, 2016
  
• 4th ACM International Workshop on Many-core Embedded Systems (MES), co-located with ISCA, 2016
  
• 2nd IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB), co-located with HPCA, 2016
  
• 13th IEEE International Conference on Pervasive Intelligence and Computing (PICom), 2015
  

External Review Committee

• 58th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2025
  
• 31st IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2025
  
• 29th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2022
  
• 27th IEEE International Conference on Electronics Circuits and Systems (ICECS), 2020
  
• Design Automation Conference (DAC), 2020
  

Editor for Journals

• ACM Transactions on Architecture and Code Optimization (TACO), 10/2023 - Present
  
• MDPI Sustainability - Special Issue "Energy-Efficient Computing Systems for Deep Learning", 2020
  

Reviewer for Journals

• ACM Communications (CACM), 2023 - Present
  
• ACM Computing Surveys (CSUR), 2019 - Present
  
• ACM Journal on Emerging Technologies in Computing Systems (JETC), 2017, 2018
  
• ACM Transactions on Architecture and Code Optimization (TACO), 2017 - 2023 (board of Distinguished Reviewers 07/2020-10/2023)
  
• ACM Transactions on Design Automation of Electronic Systems (TODAES), 2024 - Present
  
• ACM Transactions on Embedded Computing Systems (TECS), 2021 - Present
  
• ACM Transactions on Parallel Computing (TOPC), 2022 - Present
  
• Elsevier Computer Communications (COMCOM), 2023 - Present
  
• Elsevier Future Generation Computer Systems (FGCS), 2017
  
• Elsevier Journal of Parallel and Distributed Computing (JPDC), 2016 - Present
  
• Elsevier Journal of Systems Architecture (JSA), 2015 - Present
  
• Elsevier Microprocessors and Microsystems(MICPRO), 2022 - Present
  
• Elsevier Nano Communication Networks (NANOCOMNET), 2020
  
• Elsevier Neural Networks (NEUNET), 2021 - Present
  
• Elsevier Parallel Computing (PARCO), 2020 - 2022
  
• Hindawi Journal of Electrical and Computer Engineering (JECE), 2014
  
• IEEE Computer Architecture Letters (CAL), 2018 - Present
  
• IEEE Internet of Things Journal (IoT), 2023 - Present
  
• IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2020
  
• IEEE Pervasive Computing (Pervasive Comput), 2020
  
• IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020 - Present
  
• IEEE Transactions on Parallel and Distributed Systems (TPDS), 2012, 2017 - Present (review board member 02/2020-10/2021)
  
• Oxford Computer Journal (COMPJ), 2016
  
• Springer Journal of Supercomputing (SUPE), 2016 - Present
  
• Wiley Journal of Concurrency and Computation: Practice and Experience (CCPE), 2016 - 2018
  

Last update: May 2025